1. Field of the Invention
The present invention relates to an interference canceler apparatus used in a mobile communication system and, more particularly, to a multi-user parallel interference canceler apparatus used in a cellular mobile communication system using DS-CDMA (Direct Sequence Code Division Multiple Access).
2. Description Prior Art
In a conventional mobile communication system, an interference canceler is used as a technique of improving the transmission quality and increasing the cell capacity. As an interference canceler, a multi-user parallel interference canceler is available, in which temporary decisions about symbols are simultaneously made for all the users to generate replicas, and each replica is subtracted from an original signal.
A characteristic feature of the above multi-user parallel interference canceler described above is that many users can be handled as compared with a multi-user serial interference canceler in which there is a limit to the number of users who can be handled because replicas are sequentially subtracted from an original signal in descending order of levels. On the other hand, in this canceler, a hard decision error in each stage will greatly influence demodulation at another user in the next stage.
The present invention has been made in consideration of the above problem in the prior art, and has as its object to provide a multi-user parallel interference canceler apparatus which can reduce the influences of hard decision errors and improve interference removing characteristics.
In order to achieve the above object, according to the main aspect, there is provided a multi-user parallel interference canceler apparatus for repeatedly performing a hard decision over a plurality of stages to improve channel estimation precision, comprising a plurality of interference estimation units arranged in units of stages to be equal in number to users, a plurality of decision error estimation units arranged in units of stages, a plurality of combiners arranged in units of stages, and a plurality of receivers arranged in a last stage in units of users.
In the multi-user parallel interference canceler apparatus according to the main aspect described above, each of the interference estimation units comprises
a plurality of despreading processing units each for receiving a received signal or a residual signal in a preceding stage and a symbol replica signal, calculating a reception symbol signal and an estimated value of a transmission path characteristic from the received signal or residual signal and the symbol replica signal, and outputting the reception symbol signal, the estimated value of the transmission path characteristic, and the symbol replica signal from the preceding stage,
a first combiner (a RAKE combiner) for combining phase-corrected reception symbol signals corresponding to the respective fingers in the plurality of despreading processing units at a maximum ratio,
a decision unit for making a hard decision about the reception symbol signal combined by the RAKE combiner,
a plurality of replica generation units for respectively receiving the estimated values of the transmission path characteristics output from the plurality of despreading processing units, the symbol replica signals from the preceding stage, and the hard decision results obtained by the decision units, calculating symbol replica signals and chip replica signals in a current stage from the estimated values of the transmission path characteristics, the symbol replica signals from the preceding stage, and the hard decision results obtained in the decision units, and outputting the symbol replica signals and the chip replica signals,
a second combiner for combining the chip replica signals output from the plurality of replica generation units,
a first switch for outputting xe2x80x9c0xe2x80x9d as the chip replica signal, if the hard decision in the current stage differs from that in the preceding stage and the hard decision in the current stage is wrong, in accordance with a control signal output as a decision result from the decision error estimation units for checking, on the basis of a signal obtained by despreading the received signal or residual signal from the preceding stage which is input to the despreading processing unit, the symbol replica signal input from the preceding stage to the despreading processing unit, and the hard decision result in the decision unit, whether the hard decision in the current stage coincides with that in the preceding stage and the hard decision in the current stage is wrong, and otherwise outputting the chip replica signal generated by the replica generation unit, and
a second switch for outputting the symbol replica signal in the preceding stage in accordance with the control signal if the hard decision in the current stage differs from that in the preceding stage and the hard decision in the current stage is wrong, and otherwise outputting the symbol replica signal generated by the replica generation unit.
In addition, the despreading processing unit comprises a despreading unit for despreading the received signal or the residual signal from the preceding stage, an adder for adding the signal despread by the despreading unit and the symbol replica signal from the preceding stage and outputting a resultant signal as a reception symbol signal, and a channel estimation circuit for calculating an estimated value of a transmission path characteristic on the basis of the signal output from the adder, and a first multiplier for multiplying the signal output from the adder by the estimated value of the transmission path characteristic calculated by the channel estimation circuit and outputting a resultant signal as the phase-corrected reception symbol signal.
The replica generation unit comprises a second multiplier for multiplying the hard decision result in the decision unit by the estimated value of the transmission path characteristic output from the despreading processing unit and outputting a resultant signal as a symbol replica signal in the current stage, a subtracter for subtracting the symbol replica signal in the preceding stage from the symbol replica signal output from the second multiplier, and a re-despreading unit for spreading the signal output from the subtracter and outputting a resultant signal as a chip replica signal in the current stage.
The decision error estimation unit calculates a phase difference vector of the reception symbol signal, and decides that the hard decision in the current stage is wrong when an absolute value of an average of the phase difference vectors is smaller than a predetermined threshold. In addition, if all decision results in the plurality of interference estimation units indicate that hard decisions are wrong, the decision error estimation unit assumes that there is no error in the hard decision in an interference estimation unit exhibiting a largest absolute value of the average of the phase difference vectors.
The decision unit is set such that the threshold decreases toward the subsequent stages.
Each of the plurality of receivers comprises only the despreading processing unit and the RAKE combiner.
In the present invention having the above arrangement, if the hard decision result in the current stage differs from that in the preceding stage and the hard decision in the current stage is wrong, xe2x80x9c0xe2x80x9d is output as a chip replica signal. Otherwise, the chip replica signal in the current stage is output. In addition, if the hard decision result in the current stage differs from that in the preceding stage and the hard decision in the current stage is wrong, the symbol replica signal in the preceding stage is output as a reception symbol signal. Otherwise, the reception symbol signal in the current stage is output.
As described above, with respect to a user for which a hard decision error has occurred, the processing in the corresponding stage is not performed, and the result is sent from the preceding stage to the next stage without any change. Therefore, the influences of hard decision errors can be reduced, and the interference removing ability can be improved.
The above and many other objects, features and advantages of the present invention will become manifest to those skilled in the art upon making reference to the following detailed description and accompanying drawings in which preferred embodiments incorporating the principle of the present invention are shown by way of illustrative examples.